1. Field of the Invention
This invention relates to a dynamic transistor storage element of the type in which, in addition to the transistors of the storage element, at least one MI.sub.1 I.sub.2 S storage transistor is provided for receiving the data stored in the storage element.
2. Description of the Prior Art
Dynamic transistor storage elements are known in the art. For example, the German published application No. 2,148,896 describes, among other things, a one-transistor storage element which comprises a capacitor and a field effect transistor. For reading out data from a one-transistor storage element, the transistor of the storage element, which is connected on the one hand to the bit line and on the other hand to a capacitor, is rendered conductive by way of its gate terminal which is connected to a selection line. This causes the data stored in the form of a charge in the storage capacitor to flow onto the bit line via the selected field effect transistor.
Dynamic storage elements are also known in the art which have three transistors. For example, the publication "New 4,096-bit MOS Chip Is Heart Of Fast, Compact Computer Memory," Electronics, Dec. 18, 1972, Pages 97 et seq describes a storage element of this type.
The publication of L. W. Terman: "MOSFET Memory Circuits," Proceedings of the IEEE, Vol. 59, No. 7, July 1971, pp. 1044 to 1058 describes a four-transistor storage element. This is a dynamic storage element comprising two selection transistors and two switching transistors having feedback. In each case, one selection transistor is connected, on the one hand, to a bit line and, on the other hand, to a junction of the storage element. The selection transistors are commonly operable by way of a word line.
A disadvantage of such dynamic storage elements resides in the fact that the stored data must be regenerated at intervals of approximately 1 to 100 ms. A further disadvantage resides in the fact that when the supply voltage is disconnected, the data stored in the storage elements is lost.